The subject application is related to subject matter disclosed in Japanese Patent Application No. 2000-38589 filed on Feb. 16, 2000 in Japan to which the subject application claims priority under Paris Convention and which is incorporated herein by reference.
1. Field of the Invention
The present invention relates to a phase comparing circuit for detecting phase difference of two types of input signals. A phase comparing circuit used for various circuits constituted by a PLL (Phase Locked Loop), for example, a front-end processor for digital broadcasting is a subject of the present invention.
2. Related Background Art
A phase comparing circuit, which compares phases of two types of input signals FS and FR, and outputs a signal in accordance with phase difference of both signals, is proposed. FIG. 1 is a block diagram showing schematic configuration of a conventional phase comparing circuit. The phase comparing circuit of FIG. 1 is used, for example, in the PLL circuit, and is provided with a frequency phase comparator 1, a charge pump circuit 2, and a current-voltage converting circuit 3. The signal outputted from an output terminal of the frequency phase comparator 1 is inputted to the charge pump circuit 2 and a signal in accordance with the phase difference is generated. The current-voltage conversion circuit 3 outputs a voltage in accordance with the phase difference.
In the circuit of FIG. 1, when the phase of the signal FS gets ahead of that of the signal FR, the output OUT1 of the frequency phase comparator 1 outputs a pulse in accordance with the phase difference, and the output OUT2 does not output any pulse. At this time, the output terminal OUT3 of the phase comparing circuit outputs a positive pulse signal. Conversely, when the phase of the signal FS gets behind that of the signal FR, the output terminal OUT3 of the phase comparing circuit outputs a negative pulse signal.
FIG. 2 is a signal waveform diagram showing the input signals FS and FR, the output of the frequency phase comparator 1, and the output of the phase comparing circuit. FIG. 2A shows an example in which the phase difference of the input signals FS and FR is large, and FIG. 2B shows an example in which the phase difference is small.
When the phase difference is large, the voltage in accordance with the phase difference is outputted from the phase comparing circuit. When the phase difference is small, no matter how quickly the frequency phase comparator 1 and the charge pump circuit 2 operate, the phase comparing circuit cannot output the pulse signal in accordance with the phase difference due to the circuit delay.
The dotted line L2 of FIG. 3 is a diagram showing the phase difference of the phase comparing circuit of FIG. 1 and the output voltage. The smaller the phase difference of the input signals FS and FR of the frequency phase comparator 1 becomes, the worse the sensitivity of the output voltage for the phase difference gets. A region showing by an arrow of FIG. 3 is called a Dead Zone in which there is little sensitivity of the output voltage for the phase difference.
If the PLL circuit is constituted by using the phase comparing circuit having such a Dead Zone, a loop gain of the PLL circuit significantly becomes lower. Especially, a clean-up performance of the oscillator at lower frequency band becomes lower; as a result, it becomes impossible to normally perform PLL control. Here, the clean-up performance is a performance to reduce a jitter component.
Especially, in case of the digital broadcasting, phase noise performance of the oscillator is a factor to determine the performance of the system. When the system is constituted by using the phase comparing circuit having the Dead Zone such as the conventional example, it is impossible to improve the phase noise performance.
An object of the present invention is to provide a phase comparing circuit, a PLL circuit, a television broadcasting receiver and a method of comparing phase capable of outputting a signal in accordance with the phase difference with a high degree of accuracy, even if the phase difference is small.
In order to achieve the foregoing object, a phase comparing circuit, comprising:
a phase comparator configured to detect phase difference between first and second input signals;
a charge pump circuit configured to output a signal in accordance with said detected phase difference; and
a feed forward circuit connected between said phase comparator and a signal transmission path in said charge pump circuit, said feed forward circuit being configured to provide a signal in accordance with said phase difference to said charge pump circuit.
According to the present invention, the feed forward circuit is connected between the output terminal of the phase comparator and the signal transmission path in the charge pump circuit, and the voltage signal in accordance with the phase difference is directly provided to the charge pump circuit. Because of this, even if the phase difference is small, a large Dead Zone does not exist, thereby surely outputting the signal in accordance with the phase difference. Therefore, when the phase comparator of the present invention is applied to the PLL circuit, it is possible to generate a stable and high-precision oscillating signal that a jitter component is small. Especially, when the present invention is applied to the front-end processor for the digital broadcasting, it is possible to drastically improve performance of the front-end processor.
Furthermore, a PLL circuit, comprising:
a phase comparing circuit including a phase comparator configured to detect phase difference between first and second input signals, a charge pump circuit configured to output a signal in accordance with said detected phase difference, and a feed forward circuit connected between said phase comparator and a signal transmission path in said charge pump circuit, said feed forward circuit being configured to provide a signal in accordance with said phase difference to said charge pump circuit;
a voltage control oscillator configured to control oscillating frequency based on the output of said phase comparing circuit; and
a divider configured to provide a signal obtained by dividing the output frequency of said voltage control oscillator to said phase comparing circuit.
Furthermore, a television broadcasting receiver, comprising:
a bandpass filter configured to filter a signal received at an antenna;
a PLL circuit according to claim 10 configured to generate a local oscillating signal;
a mixer configured to convert a signal passing through said bandpass filter by using said local oscillating signal;
a base band processor configured to perform signal processing for the frequency-converted signal; and
a control circuit configured to control channel switching.
Furthermore, a method of comparing phases provides a voltage signal in accordance with phase difference to a charge pump circuit, based on capacity coupling between a node in a phase comparator configured to detect the phase difference of first and second input signals and a signal transmission path in said charge pump circuit configured to output a signal in accordance with said phase difference.